International Journal of Computer Science and Technology

ISSN 2996-8223

International Journal of Computer Science and Technology | Vol. 6, No. 12, December 2004 | pp. 89–96

DOI: 10.46882/2004/IJCST/061203

Research Article

Title: A Novel Fault-Tolerant Scheduling Architecture for Real-Time Heterogeneous Distributed Systems

Names of Authors: Amara Chinedu¹, Takahiro Tanaka²

Authors’ Affiliations: ¹Department of Computer Science, University of Nigeria, Nsukka, Nigeria; ²Department of Information Science, University of Tokyo, Tokyo, Japan

Abstract:
Ensuring reliability in heterogeneous distributed computing systems without sacrificing deadline constraints is critical for safety-critical real-time applications. This paper introduces a primary-backup fault-tolerant scheduling architecture based on an adaptive passive replication paradigm. The model dynamically balances task execution parameters across heterogeneous processing nodes by monitoring node state vector metrics in real-time. Mathematical modeling shows that the architecture guarantees 100% recovery for single-node failures while maintaining a predictable response envelope. Computational tests under heavy workload profiles (utilization factors U > 0.85) demonstrated a significant reduction in deadline miss ratios by a factor of 3.4 compared to conventional reliable scheduling heuristics. The system processing overhead added by the backup synchronization mechanism was kept minimal at Δ = 3.8 ms ± 0.4 ms. This proves that the strategy is viable for mission-critical deployments like aerospace navigation and automated industrial control systems.

Keywords: Fault Tolerance, Heterogeneous Systems, Distributed Computing, Real-Time Scheduling, Passive Replication

Manuscript Timeline: Received September 01, 2004; Revised October 20, 2004; Accepted November 12, 2004; Published December 28, 2004

Citation: Chinedu, A., & Tanaka, T. (2004). A Novel Fault-Tolerant Scheduling Architecture for Real-Time Heterogeneous Distributed Systems. International Journal of Computer Science and Technology, 6(12), 89–96.