A Specialized Genetic Algorithm for the Multi-Objective Structural Optimization of VLSI Floorplanning

International Journal of Computer Science and Technology | Vol. 6, No. 3, March 2004 | pp. 17–24

DOI: 10.46882/2004/IJCST/000056

Article Type: Original Research Paper

Title: A Specialized Genetic Algorithm for the Multi-Objective Structural Optimization of VLSI Floorplanning

Names of Authors: Elena Rostova¹, Carlos Mendez²

Authors’ Affiliations: ¹Faculty of Mathematics and Computer Science, Saint Petersburg State University, Russia; ²Department of Informatics, University of Barcelona, Spain

Abstract: As Very Large Scale Integration (VLSI) designs scale down to sub-micron process geometries, floorplanning becomes a dominant factor in determining overall chip performance, thermal boundaries, and manufacturing yield. This paper develops a multi-objective Genetic Algorithm (GA) optimized to solve the NP-hard floorplanning puzzle by minimizing total silicon area and wirelength simultaneously. We utilize a normalized bounded slicing tree representation to map layout coordinates, introducing a localized mutation operator that avoids premature population convergence. Experimental testing on standard MCNC benchmark circuits demonstrated that our optimized GA secures a 4.8% reduction in dead space compared to classical simulated annealing approaches. The average total wirelength was minimized by 11.2%, while the algorithm execution time remained stable under 65 s for complex blocks. This provides integrated circuit engineers with a balanced, automated tool for early-stage physical layout synthesis.

Keywords: VLSI Floorplanning, Genetic Algorithms, Multi-Objective Optimization, Physical Design Automation, Slicing Trees

Manuscript Timeline: Received: December 01, 2003; Revised: January 18, 2004; Accepted: February 10, 2004; Published: March 08, 2004

Citation: Rostova, E., & Mendez, C. (2004). A Specialized Genetic Algorithm for the Multi-Objective Structural Optimization of VLSI Floorplanning. International Journal of Computer Science and Technology, 6(3), 17–24.

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