International Journal of Computer Science and Technology

International Journal of Computer Science and Technology | Vol. 5, No. 8, August 2003 | pp. 57–64

DOI: 10.46882/2003/IJCST/000048

Article Type: Original Research Paper

Title: A Hybrid Genetic Neural Network Approach for Short-Term Electrical Load Forecasting

Names of Authors: Ahmed Al-Mansoor¹, Yuki Tanaka²

Authors’ Affiliations: ¹Department of Computer Science, King Saud University, Riyadh, Saudi Arabia; ²Graduate School of Information Science, Kyoto University, Japan

Abstract: Accurate short-term electrical load forecasting is crucial for grid operators to manage generation allocation and prevent transmission overhead. Traditional feedforward neural networks trained with the backpropagation algorithm often get stuck in local minima, leading to higher prediction errors during sudden weather shifts. This paper introduces a hybrid forecasting model that applies Genetic Algorithms (GA) to optimize the initial weights and bias configurations of a multi-layer perceptron. The hybrid network utilizes historical temperature indexes, industrial usage indicators, and calendar data to project hourly power requirements. When validated against regional grid deployment metrics, the GA-NN model yielded a Mean Absolute Percentage Error (MAPE) of 1.42%, a notable refinement over the 2.85% baseline produced by autoregressive models. The computation engine converges in less than 45 s, enabling real-time dispatch optimizations across municipal electricity infrastructures.

Keywords: Neural Networks, Genetic Algorithms, Load Forecasting, Power Systems, Hybrid Metaheuristics, Optimization

Manuscript Timeline: Received: April 05, 2003; Revised: May 28, 2003; Accepted: June 22, 2003; Published: August 14, 2003

Citation: Al-Mansoor, A., & Tanaka, Y. (2003). A Hybrid Genetic Neural Network Approach for Short-Term Electrical Load Forecasting. International Journal of Computer Science and Technology, 5(8), 57–64.

International Journal of Computer Science and Technology | Vol. 5, No. 7, July 2003 | pp. 49–56

DOI: 10.46882/2003/IJCST/000047

Article Type: Research Article

Title: Efficient Parallel Matrix Multiplication on Distributed Memory Architectures Using Symmetric Block Cyclic Allocation

Names of Authors: Ming-Wei Chen¹, Sarah Jenkins²

Authors’ Affiliations: ¹Department of Software Engineering, Tsinghua University, Beijing, China; ²Department of Cybersecurity, MIT, Massachusetts, USA

Abstract: Large-scale scientific computing and engineering simulations depend heavily on the performance of fundamental linear algebra operations executed over distributed clusters. This research presents an optimized parallel matrix multiplication algorithm designed for high-performance distributed memory architectures. We present a Symmetric Block Cyclic Data Allocation (SBCDA) framework that optimizes communication topologies by matching sub-matrix data dimensions with physical processor grid layouts. Message Passing Interface (MPI) primitives are used to coordinate non-blocking communications during parallel execution phases. Performance benchmarks conducted on a cluster of 64 Intel Xeon processors demonstrated a sustained computation speed of 245 GFLOPS for dense 10,000 × 10,000 matrices. This matches an aggregate parallel efficiency of 88.5% relative to theoretical peak processing ceilings. Our balancing technique minimizes communication overhead by 23.4%, offering scalable performance profiles for complex computational fluid dynamics solvers.

Keywords: Parallel Computing, Distributed Memory, Matrix Multiplication, MPI, Load Balancing, Cluster Architecture

Manuscript Timeline: Received: March 10, 2003; Revised: May 02, 2003; Accepted: June 04, 2003; Published: July 11, 2003

Citation: Chen, M.-W., & Jenkins, S. (2003). Efficient Parallel Matrix Multiplication on Distributed Memory Architectures Using Symmetric Block Cyclic Allocation. International Journal of Computer Science and Technology, 5(7), 49–56.

International Journal of Computer Science and Technology | Vol. 5, No. 6, June 2003 | pp. 41–48

DOI: 10.46882/2003/IJCST/000046

Article Type: Original Research Paper

Title: A Robust Digital Image Watermarking Scheme in the Discrete Wavelet Transform Domain

Names of Authors: Elena Rostova¹, Carlos Mendez²

Authors’ Affiliations: ¹Faculty of Mathematics and Computer Science, Saint Petersburg State University, Russia; ²Department of Informatics, University of Barcelona, Spain

Abstract: Copyright protection of digital multimedia assets has become an urgent concern with the widespread adoption of unencrypted internet distribution platforms. This paper presents a robust, imperceptible digital image watermarking technique operating in the Discrete Wavelet Transform (DWT) domain. The proposed method decomposes the host image into three resolution levels, embedding a pseudo-random binary sequence watermark into the high-frequency sub-bands (LH and HL) to guarantee transparency. Watermark insertion values are adaptively adjusted based on localized human visual system parameters, achieving a peak signal-to-noise ratio (PSNR) of 42.15 ± 0.35 dB across standard test images. Robustness benchmarks show the embedded signature can be recovered with a correlation coefficient exceeding 0.92 after severe JPEG compression down to a 20% quality factor. The system also shows high resilience against malicious attacks, including median filtering, salt-and-pepper noise injection, and cropping.

Keywords: Digital Watermarking, Discrete Wavelet Transform, Copyright Protection, Information Hiding, Robustness, Image Processing

Manuscript Timeline: Received: February 02, 2003; Revised: March 24, 2003; Accepted: April 29, 2003; Published: June 08, 2003

Citation: Rostova, E., & Mendez, C. (2003). A Robust Digital Image Watermarking Scheme in the Discrete Wavelet Transform Domain. International Journal of Computer Science and Technology, 5(6), 41–48.

International Journal of Computer Science and Technology | Vol. 5, No. 5, May 2003 | pp. 33–40

DOI: 10.46882/2003/IJCST/000045

Article Type: Research Article

Title: Enhancing Web Cache Performance Using a Predictive Least Recently Used Replacement Policy

Names of Authors: William H. Vance¹, Aria Montgomery²

Authors’ Affiliations: ¹Department of Computer Science, Stanford University, California, USA; ²Department of Software Engineering, Australian National University, Canberra, Australia

Abstract: The rapid growth of World Wide Web traffic creates significant data bottlenecks, highlighting the need for efficient caching mechanisms to minimize user response latency. Traditional page substitution algorithms, such as Least Recently Used (LRU), fail to account for the structural hyperlink relationships between consecutive web object requests. This study introduces an enhanced Predictive Least Recently Used (P-LRU) replacement policy that integrates a Markov chain model to anticipate future page hits. By tracking historical access sequences, P-LRU preserves high-probability secondary documents in the cache proxy memory before they are explicitly requested. Experimental evaluations utilizing real proxy server access logs comprising 1.5 million requests demonstrated a 12.6% increase in byte hit ratio compared to standard LRU engines. Additionally, the average document latency dropped from 1.84 s down to 1.35 s, optimizing the browsing experience over limited bandwidth dial-up networks.

Keywords: Web Caching, Proxy Servers, Replacement Algorithms, Markov Models, Prefetching, Network Latency

Manuscript Timeline: Received: January 11, 2003; Revised: March 01, 2003; Accepted: April 05, 2003; Published: May 15, 2003

Citation: Vance, W. H., & Montgomery, A. (2003). Enhancing Web Cache Performance Using a Predictive Least Recently Used Replacement Policy. International Journal of Computer Science and Technology, 5(5), 33–40.

International Journal of Computer Science and Technology Vol. 5, No. 5, May 2003 | pp. 33–40

DOI: 10.46882/2003/IJCST/000053

Research Article

Title: A Balanced Cell-Split Index Model for High-Density Geographical Database Systems

Names of Authors: John A. Smith¹, Mariam O. Alabi²

Authors’ Affiliations: ¹Department of Computer Science, University of California, Berkeley, USA; ²Department of Information Technology, Federal University of Technology, Minna, Nigeria.

Abstract:
Geographic Information Systems require advanced spatial look-up layers to execute multi-dimensional polygon matching and proximity searching without introducing long query latency patterns. Standard bounding-box layout methods suffer from severe performance bottlenecks as geographical database densities grow, inflating the data filtration path length significantly. This paper presents an optimized spatial index model, Balanced Cell-Split (BCS), created specifically for dense geometric record layouts. The framework divides complex topographical data vectors into dynamic, non-overlapping hierarchical cells using a localized quadrant matching formula. We benchmarked coordinate query speeds across a reference database containing 50 million geographical features under fluctuating request frequencies. The experimental results demonstrate a 24.5% reduction in average query retrieval timelines alongside an 18.2% enhancement in overall indexing resource utilization compared to traditional R-tree and quad-tree baselines. The memory footprint for index paths scales linearly, establishing a reliable storage blueprint for massive geospatial repositories.

Keywords: Spatial Indexes, Geographical Information Systems, Database Optimization, Geometric Coordinates, Data Architecture, Retrieval Latency.

Manuscript Timeline: Received: January 10, 2003; Revised: February 22, 2003; Accepted: March 12, 2003; Published: May 22, 2003.

Citation: Smith, J. A., & Alabi, O. M. (2003). A Balanced Cell-Split Index Model for High-Density Geographical Database Systems. International Journal of Computer Science and Technology, 5(5), 33–40.

International Journal of Computer Science and Technology | Vol. 5, No. 4, April 2003 | pp. 25–32

DOI: 10.46882/2003/IJCST/000044

Article Type: Original Research Paper

Title: An Adaptive Packet Scheduling Algorithm for Quality of Service Provisioning in Wireless ATM Networks

Names of Authors: Rajesh Kumar¹, David Zhao²

Authors’ Affiliations: ¹Department of Computer Science and Automation, Indian Institute of Science, Bangalore, India; ²School of Computer Engineering, Nanyang Technological University, Singapore

Abstract: Providing guaranteed Quality of Service (QoS) in wireless Asynchronous Transfer Mode (ATM) networks presents a significant engineering challenge due to high burst error rates and limited channel bandwidth. This paper proposes a novel adaptive packet scheduling algorithm that dynamically adjusts cell transmission priorities based on real-time channel state feedback and delay bounds. The algorithm incorporates an aggressive cell-dropping filter for non-real-time traffic when the channel bit error rate drops below 10⁻³. Computer simulations conducted using synthetic multimedia traffic profiles show that the proposed scheduling policy increases overall channel utilization efficiency by 18.4%. Furthermore, it successfully limits cell transfer delay variations to less than 5.2 ms for time-critical voice services under high mobility patterns. The computational complexity of our model scales linearly at O(N), proving its capability for deployment within high-speed base station processing units.

Keywords: Wireless ATM, Packet Scheduling, Quality of Service, Dynamic Bandwidth Allocation, Mobile Communication

Manuscript Timeline: Received: December 14, 2002; Revised: February 02, 2003; Accepted: March 10, 2003; Published: April 12, 2003

Citation: Kumar, R., & Zhao, D. (2003). An Adaptive Packet Scheduling Algorithm for Quality of Service Provisioning in Wireless ATM Networks. International Journal of Computer Science and Technology, 5(4), 25–32.